Immediate

The number of clock periods periods shown in this table includes the time to fetch immediate operands, perform the operations, store the results and read  the next operation. The number of bus read and write cycles is shown in parenthesis as (r/w). The number of clock periods and the number of read and write cycles must be added respectively to those of the effective address calculation where indicated.

Immediate Instruction Execution Times

 Instruction  Size  op #,Dn  op #,An  op #,M
 ADDI  Byte, Word  8 ( 2 / 0 )  –  12 ( 2 / 1 ) +
         Long  16 ( 3 / 0 )  –  20 ( 3 / 2 ) +
 ADDQ  Byte, Word  4 ( 1 / 0 )  8 ( 1 / 0 ) *  8 ( 1 / 1 ) +
         Long   8 ( 1 / 0 )  8 ( 1 / 0 )  12 ( 1 / 2 ) +
 ANDI  Byte, Word  8 ( 2 / 0 )  –  12 ( 2 / 1 ) +
         Long  16 ( 3 / 0 )  –  20 ( 3 / 1 ) +
 CMPI  Byte, Word  8 ( 2 / 0 )  –   8 ( 2 / 0 ) +
         Long  14 ( 3 / 0 )  –  12 ( 3 / 0 ) +
 EORI  Byte, Word  8 ( 2 / 0 )  –  12 ( 2 / 1 ) +
         Long  16 ( 3 / 0 )  –  20 ( 3 / 2 ) +
 MOVEQ        Long   4 ( 1 / 0 )  –  –
 ORI  Byte, Word  8 ( 2 / 0 )  –  12 ( 2 / 1 ) +
         Long  16 ( 3 / 0 )  –  20 ( 3 / 2 ) +
 SUBI  Byte, Word  8 ( 2 / 0 )  –  12 ( 2 / 1 ) +
         Long  16 ( 3 / 0 )  –  20 ( 3 / 2 ) +
 SUBQ  Byte, Word  4 ( 1 / 0 )  8 ( 1 / 0 ) *  8 ( 1 / 1 ) +
         Long   8 ( 1 / 0 )  8 ( 1 / 0 )  12 ( 1 / 2 ) +
             + Add effective address calculation time
             * Word only